Yokogawa JUXTA VJ Series Limit Alarms Manual de usuario descargar pdf (Pagina 53)

6-3

IM 77J01J11-01E 3rd Edition : Oct. 15, 2007-00

6.3.1 Contents of D Registers

● D0001: Bit configuration of status

The D0001 register represents errors and parameter data by a combination of bits in the

In the table below, if any of the events shown occurs, the corresponding bit is set to "1."

The bit remains set to "0" if the event has not occurred yet. Note that blank fields indicate

bits not used, which are in "0."

Bit Event

0 EEP error

1 EEP sum error

2 Low-cut status

3 AD off-scale (burnout)

4 Communication error

6 History of power failures

7 RJC error

8 "1" if alarm 1 is on, or "0" if off

9 "1" if alarm 2 is on, or "0" if off

10 Status of contact input

11 Status of contact output

12 Overflow of computation cycle

13 Computation overflow

1 2 ... 48 49 50 51 52 53 54 55 56 57 58 59 60

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Yokogawa JUXTA VJ Series Limit Alarms Manual de usuario Pagina 53